14 lines
332 B
Coq
14 lines
332 B
Coq
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module counter_with_enable(out, enable, clk, reset);
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parameter WIDTH = 8;
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input enable, clk, reset;
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output[WIDTH-1:0] out;
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reg[WIDTH-1:0] out;
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always @(posedge clk)begin
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if (reset) begin
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out <= 8'b0;
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end else if(enable) begin
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out <= out + 1;
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end
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end
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endmodule
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